Altera MAX II EPM240 CPLD Development Board

  1. Onboard EPM240T100C5N chip
  2. EPROM chip configuration using EPCS4, the size of 8Kbit
  3. Onboard 50M active patch crystal (Crystal Slaughter halfback)
  4. Power supply with a largemouth outlet, single 5V power supply
  5. Board has a power indicator and resets switch

 1,586.00

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User Manual

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ALTERA introduction

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EPM240 Minimal Development Board Schematic

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MAX II Device Family Datasheet.pdf

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EPM240MAINBOARD Schematic Diagram.pdf

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FPGA Chip

EPM240T100C5N

Input Voltage (V)

5

Input / Output Pins

100

EEPROM chip

8Kbit EPCS4

Oscillator Frequency (MHz)

50

FPGA IO voltage (V)

3.3

Length (mm):

70

Width (mm):

50

Height (mm):

13

Weight (g):

27

Shipping Weight 0.03 kg
Shipping Dimensions 7 × 6 × 6 cm

The Altera MAX II EPM240 CPLD Development Board is from ALTERA MAX II family CPLD chip EPM240T100C5N minimum system board, with a byte-blaster and usb-blaster download for product validation and development.
JTAG and power supply interface board set aside and led all pins, just connect the 5V power supply, it can work, extremely convenient to use.
CPLD chip is very suitable for the input of low-cost CPLD / FPGA, the user leads the expansion of external circuits according to the IO port of the core plate: LED lights, digital tube, LCD liquid crystal, serial communication, etc.


 Features:

  1. Onboard the EPM240T100C5N chip.
  2. EPROM chip configuration using EPCS4, the size of 8Kbit.
  3. Onboard 50M active patch crystal (Crystal Slaughter halfback).
  4. Power supply with a largemouth outlet, single 5V power supply.
  5. Board has a power indicator and reset switch.
  6. More IO ports and clock pins through the pin leads through these interfaces can be extended to any memory and peripherals.
  7. Board Dimension (LxWxH) mm: 72 x 52 x 13mm.
  8. Weight: 21gm.

Package Includes:

1 x Altera MAX II EPM240 CPLD Development Board

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